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The compact d.c. electrothermal model of power MOSFETs for SPICE
Author(s) -
Zarębski Janusz
Publication year - 2009
Publication title -
international journal of numerical modelling: electronic networks, devices and fields
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.249
H-Index - 30
eISSN - 1099-1204
pISSN - 0894-3370
DOI - 10.1002/jnm.728
Subject(s) - spice , rectifier (neural networks) , transistor , thermal resistance , power semiconductor device , power (physics) , materials science , voltage , electrical engineering , transistor model , thermal , optoelectronics , electronic engineering , engineering , computer science , physics , thermodynamics , stochastic neural network , machine learning , recurrent neural network , artificial neural network
This paper concerns the problem of modelling of power MOS transistors in SPICE. In the paper the new form of the electrothermal d.c. model (ETM) of the considered class of power devices is proposed. The ETM is based on the modified Shichman–Hodges model, in which the generation current, the breakdown voltage, the sub‐threshold region, the thermally dependent series resistances and self‐heating are included. The device inner temperature calculated from the thermal model is the sum of the ambient temperature and the product of the electrical power dissipated inside the device and its thermal resistance. The presented model has been verified experimentally. The results of calculations and measurements of MTD15N06V (ON Semiconductor) and IRF840 (International Rectifier) transistors are given as well. Copyright © 2009 John Wiley & Sons, Ltd.