Premium
New RF extrinsic resistances extraction procedure for deep‐submicron MOS transistors
Author(s) -
Tinoco J. C.,
Raskin J.P.
Publication year - 2009
Publication title -
international journal of numerical modelling: electronic networks, devices and fields
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.249
H-Index - 30
eISSN - 1099-1204
pISSN - 0894-3370
DOI - 10.1002/jnm.726
Subject(s) - transistor , extraction (chemistry) , noise (video) , electronic engineering , equivalent circuit , series (stratigraphy) , computer science , electrical engineering , engineering , artificial intelligence , voltage , paleontology , chemistry , chromatography , image (mathematics) , biology
The modeling of MOS transistors used for RF applications needs the definition of a lumped equivalent circuit where the intrinsic device and series extrinsic resistances are properly evaluated. The model accuracy depends on the extraction precision of each intrinsic lumped element. In order to determine the intrinsic device behavior, it is necessary to first remove the series extrinsic resistances. For this reason their extraction becomes critical for the modeling of MOS transistors in RF circuit design. Several extraction methods have been proposed; nevertheless, the measurement noise strongly affects the obtained results. The method proposed by Bracale and co‐workers is the most robust extraction procedure against measurement noise, but fails to predict correctly the series extrinsic resistances for deep‐submicron devices. For those reasons, we deeply analyze the method proposed by Bracale in order to understand and then overcome its limitations. Based on those analyses, a robust extraction method for deep‐submicron devices is proposed. Copyright © 2009 John Wiley & Sons, Ltd.