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Differential block frequency compensation for low‐power multistage amplifiers
Author(s) -
Asiyabi Tayebeh,
Torfifard Jafar
Publication year - 2018
Publication title -
international journal of numerical modelling: electronic networks, devices and fields
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.249
H-Index - 30
eISSN - 1099-1204
pISSN - 0894-3370
DOI - 10.1002/jnm.2517
Subject(s) - feed forward , compensation (psychology) , frequency compensation , control theory (sociology) , computer science , figure of merit , block (permutation group theory) , electronic circuit , amplifier , capacitance , electronic engineering , bandwidth (computing) , differential (mechanical device) , topology (electrical circuits) , electrical engineering , mathematics , physics , engineering , telecommunications , control engineering , psychology , geometry , control (management) , electrode , quantum mechanics , artificial intelligence , psychoanalysis , computer vision , thermodynamics
A new power‐efficient frequency compensation structure is presented, named the differential block frequency compensation (DBFC) topology. The new compensation technique employs a fully differential stage to organize feedforward and feedback paths. The DBFC technique relieves feedforward and able to amplify feedback currents to move poles and zeros accordingly, which leads to pole‐zero cancelation scenario. Initially, the proposed structure uses only small compensation capacitance, which means very compact and refined design. The proposed circuit along with several state‐of‐the‐art designs from the literature have been extensively analyzed and compared together. The results reveal the improvement regarding to figure of merit factors, which highlight size of compensation circuits, stability, and power dissipation issues. Moreover, the gain‐bandwidth product increases more than 30 times than of other compared circuits.