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Open‐source circuit simulation tools for RF compact semiconductor device modelling
Author(s) -
Grabinski Wladek,
Brinson Mike,
Nenzi Paolo,
Lannutti Francesco,
Makris Nikolaos,
Antonopoulos Angelos,
Bucher Matthias
Publication year - 2014
Publication title -
international journal of numerical modelling: electronic networks, devices and fields
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.249
H-Index - 30
eISSN - 1099-1204
pISSN - 0894-3370
DOI - 10.1002/jnm.1973
Subject(s) - standardization , computer science , verilog , cmos , transistor model , hardware description language , transistor , electronic engineering , electrical engineering , computer architecture , embedded system , engineering , operating system , field programmable gate array , voltage
SUMMARY MOS‐Modelle und Parameterextraktion Arbeitskreis (MOS‐AK) is a European, independent compact modelling forum created by a group of engineers, researchers and compact modelling enthusiasts to promote advanced compact modelling techniques and model standardization using high‐level behavioural modelling languages such as VHDL‐AMS and Verilog‐A. This invited paper summarizes recent MOS‐AK open‐source compact model standardization activities and presents advanced topics in metal–oxide–semiconductor field‐effect transistor modelling, focusing in particular on analogue/radio frequency applications. The paper discusses links between compact models and design methodologies, finally introducing elements of compact model standardization. The open‐source computer‐aided design tools Qucs, QucsStudio and ngspice all support Verilog‐A as a hardware description language for compact model standardization. Latter sections of this paper describe a Verilog‐A implementation of the EKV3 MOS transistor model. Additionally, the simulated radio frequency model performance is evaluated and compared with experimental results for 90 nm CMOS technology. Copyright © 2014 John Wiley & Sons, Ltd.