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VHDL‐AMS in switched‐current analog filter pair design based on a gyrator‐capacitor prototype circuit
Author(s) -
Handkiewicz Andrzej,
Katarzyński Piotr,
Szczęsny Szymon,
Naumowicz Mariusz,
Melosik Michał,
Śniatała Paweł
Publication year - 2013
Publication title -
international journal of numerical modelling: electronic networks, devices and fields
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.249
H-Index - 30
eISSN - 1099-1204
pISSN - 0894-3370
DOI - 10.1002/jnm.1921
Subject(s) - gyrator , filter (signal processing) , computer science , switched capacitor , active filter , electronic engineering , capacitor , filter design , vhdl , electronic filter , electrical engineering , engineering , computer hardware , voltage , field programmable gate array
SUMMARY This paper presents an approach to a low‐sensitivity design strategy for switched‐current (SI) filter pairs based on a gyrator‐capacitor prototype circuit. On the basis of a prototype filter, an SI counterpart circuit is obtained. Tools for SI filter design automation have been developed, which make a hardware description language ‐ analog‐mixed signal synthesization for the chosen kind of circuit. The obtained SI filter is better than the filter obtained using LC ladder structures with respect to very‐large‐scale integration complementary metal‐oxide‐semiconductor chip area and power consumption. Copyright © 2013 John Wiley & Sons, Ltd.