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P.18: Effects of Interface and Bulk States on the Stability of Amorphous InGaZnO Thin Film Transistors under Gate Bias and Temperature Stress
Author(s) -
Zhan Runze,
Dong Chengyuan,
Shi Junfei,
Chen Yuting,
Wu Jie,
Yang BoRu,
Shieh HanPing D.
Publication year - 2013
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/j.2168-0159.2013.tb06403.x
Subject(s) - thin film transistor , materials science , amorphous solid , stress (linguistics) , instability , layer (electronics) , negative bias temperature instability , stability (learning theory) , oxygen , condensed matter physics , transistor , optoelectronics , threshold voltage , composite material , electrical engineering , chemistry , crystallography , mechanics , physics , computer science , linguistics , philosophy , organic chemistry , voltage , machine learning , engineering
The gate bias and temperature instability of InGaZnO TFTs were improved by adopting double stacked channel layer (DSCL). The mechanism of V th shift under stress was studied by this structure. An interface with of less oxygen plasma damaging and lower oxygen vacancies in bulk were achieved by DSCL, resulting in a higher stability of V th .