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35.3: A 10‐bit Linear R‐string DAC Architecture for Mobile Full‐HD AMOLED Driver ICs
Author(s) -
Kim KiDuk,
Park ChangByung,
Lee SungWoo,
Park GyuSung,
Cho GyuHyeong,
Kim Jeongpyo,
Kim Jinbong,
Choi YoonKyung,
Kim Jongseon,
Hwang Gyoocheol,
Lee Myunghee
Publication year - 2013
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/j.2168-0159.2013.tb06249.x
Subject(s) - amoled , least significant bit , string (physics) , settling time , cmos , integral nonlinearity , computer science , computer hardware , bit (key) , voltage , physics , electrical engineering , optoelectronics , engineering , electrode , operating system , converters , computer security , quantum mechanics , control engineering , active matrix , step response , thin film transistor
A display driver IC prototype for mobile full‐HD AMOLED display is presented. Since full‐HD AMOLED display has too short driving time, conventional R‐string DAC column driver cannot obtain enough internal settling time. To solve the problem, therefore, a new R‐string DAC column driver architecture is proposed, which has much faster settling time with high accuracy. Also, with the architecture, one 8‐bit PTL in conventional R‐string DAC is replaced with much smaller two sub‐PTLs, decreasing the overall driver area. The measured INL and DNL are 0.49 LSB and 0.38 LSB, respectively. The mean and maximum value of inter‐channel DVO is 4.6mV and 7mV, respectively. The proposed linear 10‐bit DAC fabricated on 90‐nm CMOS process occupies 81% of conventional nonlinear 8‐bit R‐string DAC area in the same technology.