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42.1: Distinquished Paper : A 1.4‐Gbps Intra‐Panel Interface for Chip‐On‐Glass TFT‐LCD Applications
Author(s) -
Lee Dongmyung,
Baek Dong Hoon,
Lee KilHoon,
Pae Han Su,
Lee JaeYoul,
Yu Wang,
Choi Young Min,
Lee Young Hun,
Lee Sun Ik,
Lee Woo Sung,
Lee Dae Joon,
Lee Myunghee
Publication year - 2012
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/j.2168-0159.2012.tb05844.x
Subject(s) - interface (matter) , liquid crystal display , thin film transistor , cmos , voltage , biasing , chip , computer science , electrical engineering , electronic engineering , materials science , computer hardware , optoelectronics , engineering , bubble , layer (electronics) , maximum bubble pressure method , parallel computing , composite material
A high‐speed intra‐panel interface with an enhanced reduced voltage differential signaling (eRVDS) scheme is implemented in a 0.18‐μm high‐voltage CMOS process for the chip‐on‐glass (COG) TFT‐LCD applications. The proposed interface employs the zero‐adjustable equalizer to enhance the maximum data rate, the early charge sharing scheme to improve the interface data transfer efficiency, and dynamic biasing technique to reduce a power consumption of the output buffers. Measured result demonstrates the maximum data rate of 1.4 Gbps from a 1.8‐V supply voltage with a WQXGA 60‐Hz COG TFT‐LCD prototype panel.