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30.2: UD Resolution 240Hz LCD TV Display System with High Speed Driving
Author(s) -
You Bong Hyun,
Bae Jae Sung,
Park Dong Won,
Hong Seok Ha,
Saito Satoru,
Moon Ju Tae
Publication year - 2012
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1002/j.2168-0159.2012.tb05799.x
Subject(s) - frame rate , frame (networking) , liquid crystal display , computer science , macro , pixel , computer hardware , line (geometry) , scheme (mathematics) , display resolution , division (mathematics) , shutter , rolling shutter , real time computing , display device , engineering , artificial intelligence , telecommunications , mechanical engineering , mathematical analysis , geometry , mathematics , programming language , operating system , arithmetic
The Ultra high Definition (3840times2160) resolution, 70″ LCD TV with 240Hz frame rate has been developed. A cost effective single bank driving architecture with multi‐chip structure is realized by adopting a vertical quarter partitioned (VQP) and overlap data exchange (ODX) driving scheme. Even though half‐gate two‐data line design (hG‐2D) is adopted to overcome the charging time limitation, scan line overlapping driving scheme has also been implemented to enhance the actual pixel charging performance. The 240Hz frame rate driving technology makes 3‐dimensional display through temporal division such as 3D display of active shutter glass possible. Furthermore, a novel up‐scaling algorithm with inventive single‐frame super‐resolution methodologies has been invented to cope with input display data of FHD resolution.

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