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Numerical investigation of cross plate fin heat sink integrated with phase change material for cooling application of portable electronic devices
Author(s) -
Kumar Anuj,
Kothari Rohit,
Sahu Santosh Kumar,
Kundalwal Shailesh Ishwarlal,
Paulraj Maheandera Prabu
Publication year - 2021
Publication title -
international journal of energy research
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.808
H-Index - 95
eISSN - 1099-114X
pISSN - 0363-907X
DOI - 10.1002/er.6404
Subject(s) - phase change material , heat sink , overheating (electricity) , materials science , heat flux , paraffin wax , thermal , thermal resistance , thermodynamics , heat transfer , composite material , mechanics , electrical engineering , wax , physics , engineering
Summary The design of thermal management system needs to be made in such a way that can avoid the possible overheating and failure of electronic components because of higher power density. Thermal performance of heat sink (HS) configurations involving different number of cavities (1, 4, 9, 16, 25, and 36), formed by cross plate fins arrangement, as applicable to thermal management of electronic components, are studied numerically by employing pressure‐based finite volume method. Mass and thermal capacity of each HS configuration are kept constant and various heat flux values (1.0, 1.5, and 2.0 kW/m 2 ) are used in the analysis. The performance of various HS configurations is evaluated based on the transient temperature variation of HS base, PCM melt fraction, average Nusselt number, and energy absorbed by PCM through both latent and sensible heat. The study also investigates the effect of various PCM materials on thermal performance of HS. Maximum 10°C of temperature reduction is achieved in case of HS with 25 cavities compared to HS with a single cavity. For HS with 36 cavities, the melting time of the PCM reduces by 46.5% with the increase in the heat flux values from 1.0 to 2.0 kW/m 2 . The study on effect of PCM type reveals that paraffin wax is ideally suited for those electronic devices which have the critical set point temperature (SPT) above 60°C and below 70°C.

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