Premium
A multilevel PWM strategy suitable for high‐voltage motor direct drive systems with consideration of the adverse effect of dead time
Author(s) -
Tadano Yugo,
Urushibata Shota,
Ogura Kazuya,
Shigaki Akira,
Nomura Masakatsu
Publication year - 2008
Publication title -
electrical engineering in japan
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.136
H-Index - 28
eISSN - 1520-6416
pISSN - 0424-7760
DOI - 10.1002/eej.20474
Subject(s) - pulse width modulation , total harmonic distortion , control theory (sociology) , voltage , waveform , inverter , engineering , dead time , induction motor , motor drive , line (geometry) , electronic engineering , computer science , electrical engineering , mathematics , control (management) , mechanical engineering , statistics , geometry , artificial intelligence
Recently, high‐voltage motor direct drive systems have been put to practical use, and various multilevel PWM strategies have also been proposed. This paper describes a multilevel PWM strategy [our group calls it the Carrier Phase Selection Method (CPS)] that has the lowest line voltage harmonic distortion in order to prevent the degradation of high‐voltage motor winding insulations. This method takes the adverse effect of dead time into consideration, and it controls the shift direction of a carrier phase. Therefore, a favorable output waveform without instantaneous voltage surges is achieved even if the line voltage level changes. Moreover, the switching transitions across all switching devices are well‐balanced, so the utilization of inverter unit cells is equalized. This is an important factor when designing the entire system. Based on simulation and experimental results, it is shown that this CPS method is particularly effective in high‐voltage motor direct drive systems. © 2008 Wiley Periodicals, Inc. Electr Eng Jpn, 165(2): 77–88, 2008; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20474