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A power factor correction with two‐input current mode using voltage doubler rectifier
Author(s) -
Yamamoto Isamu,
Matsui Keiju
Publication year - 2001
Publication title -
electrical engineering in japan
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.136
H-Index - 28
eISSN - 1520-6416
pISSN - 0424-7760
DOI - 10.1002/eej.1095
Subject(s) - rectifier (neural networks) , harmonics , power factor , electrical engineering , voltage doubler , capacitor , electronic circuit , voltage , harmonic , power (physics) , power electronics , electronic engineering , engineering , computer science , physics , voltage source , acoustics , stochastic neural network , quantum mechanics , machine learning , recurrent neural network , artificial neural network , dropout voltage
For rectifier circuits with a small capacity, such as those for consumer electronics and appliances, capacitor input‐type rectifier circuits are generally used. Consequently, various harmonics generated within the power system become a serious problem. Various studies of this effect have been reported. However, most of these employ switching devices, such as FETs and the like. The absence of switching devices makes systems more tolerant to overload, and brings low radio noise benefits. We propose a power factor correction scheme using a voltage doubler rectifier without switching devices. In this method, the input current is divided into two periods, where one period charges the small input capacitor and the other charges the large output capacitor. By dividing the input current into two different modes, the current conduction period can be widened and harmonics can largely be canceled between the two modes. Hence, the harmonic characteristics can be significantly improved, whereby the lower‐order harmonics, such as the fifth and seventh orders, are much reduced. The results are confirmed by theoretical and experimental implementations. © 2001 Scripta Technica, Electr Eng Jpn, 137(3): 52–58, 2001