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A servo design for slave clock in IEEE 1588 synchronization networks
Author(s) -
Fan Zhiyu,
Liu Yuan'an,
Li Hu,
Yuan Dongming,
Hu Hefei
Publication year - 2013
Publication title -
international journal of communication systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.344
H-Index - 49
eISSN - 1099-1131
pISSN - 1074-5351
DOI - 10.1002/dac.2691
Subject(s) - computer science , control theory (sociology) , clock synchronization , pid controller , synchronization (alternating current) , clock skew , digital clock manager , timing failure , kalman filter , controller (irrigation) , control engineering , telecommunications , control (management) , engineering , channel (broadcasting) , artificial intelligence , temperature control , agronomy , clock signal , jitter , biology
Summary Clock synchronization is critical for a variety of applications in communication networks. In this paper, we design a clock servo named VI_PID‐K, which consists of a variable integral PID controller and a Kalman filter. It is a pre‐correction mechanism for the skew based on feedback principle to compensate for the poor stability of local clocks in IEEE 1588 networks. Our contribution is establishing discrete differential equation models, bringing in a variable integral PID controller to adjust the skew error and a Kalman filter to act as a skew estimator to predict the skew during one synchronization interval. Simulation results demonstrate that VI_PID‐K provides a more stable disciplined clock, improves the speed of skew convergence, and reduces Allan variance in a large time scale when compared to PI method or Fixed_Integral method.VI_PID‐K can improve the stability of slave clock and reduce the frequency that master clock sends Sync messages, so the network overhead for clock synchronization can be reduced. Copyright © 2013 John Wiley & Sons, Ltd.