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Fast settling frequency synthesizer with two‐point channel control paths
Author(s) -
Shin Sangho,
Kang SungMo “Steve”
Publication year - 2012
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.772
Subject(s) - settling time , voltage controlled oscillator , phase locked loop , resistor , frequency synthesizer , bandwidth (computing) , control theory (sociology) , cmos , phase noise , settling , electronic engineering , electrical engineering , pll multibit , voltage , engineering , computer science , telecommunications , step response , control (management) , control engineering , artificial intelligence , environmental engineering
SUMMARY A frequency synthesizer with low‐power and very short settling time is introduced, which utilizes two‐point channel control paths. While the main‐path is the same as normal channel controls, a digital‐to‐analog converter (DAC) with tunable gain is used for the compensation‐path to form a feed‐forward direct voltage‐controlled oscillator (VCO) control path. When the two paths are ideally matched, the two‐point control can show zero settling time regardless of the amount of frequency change. However, the settling time performance can be significantly degraded if there exists any mismatch between the two paths. In order to remove the mismatch, a simple compensation method combining a linearized VCO with a resistor‐loaded tunable DAC is presented. We show that the overall mismatch can be effectively tuned out by controlling the DAC load resistor, since the mismatch caused by process–voltage–temperature variations is dominated by the resistor variation. We have achieved near‐zero settling time for 75thinspaceMHz frequency jumping from 2.4 GHz even with the use of narrow phase‐locked loop (PLL) bandwidth of 20 kHz. When the phase noise at 1 MHz offset from 2.4 GHz is − 116.6dBc/ Hz, the total PLL power consumption using 0.18 µm CMOS technology is only 4.2 mW. Copyright © 2011 John Wiley & Sons, Ltd.