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Parallel processing for analogue fault diagnosis
Author(s) -
Wey ChinLong
Publication year - 1988
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.4490160303
Subject(s) - computer science , automatic test pattern generation , set (abstract data type) , fault coverage , algorithm , parallel algorithm , fault (geology) , parallel architecture , parallel processing , parallel computing , degree (music) , line (geometry) , architecture , electronic circuit , mathematics , engineering , acoustics , visual arts , programming language , geometry , art , physics , electrical engineering , seismology , geology
The computer‐aided testing (CAT) problem is inherently a large scale systems problem, it is essential to exploit whatever computational power is available to reduce the computational requirements for both on‐line and off‐line test processes. In particular, digital CAT algorithms often use some degree of parallel processing in their implementation. Therefore, the degree to which an analogue CAT algorithm can be implemented in parallel becomes a significant factor in determining its viability. In this paper, a parallel test algorithm and the associated architecture for the test system for analogue circuits and systems are proposed. the proposed test algorithm is applicable to testing multiple faults. Based on a combinatorial covering set approach, the conditions for the non‐sequential execution of the test algorithm is analysed and the parallel processing to generate the test results is also addressed. Although this paper is motivated on the discussions of analogue fault diagnosis, the proposed parallel algorithm and the combinatorial covering approach can also be applied to digital testing.