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Generalized ladder synthesis by subnetwork removal
Author(s) -
MouYan Zou,
Unbehauen R.
Publication year - 1987
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.4490150202
Subject(s) - subnetwork , realization (probability) , electrical impedance , port (circuit theory) , matrix (chemical analysis) , process (computing) , computer science , impedance parameters , mathematics , topology (electrical circuits) , control theory (sociology) , engineering , electronic engineering , electrical engineering , artificial intelligence , statistics , composite material , operating system , computer security , materials science , control (management)
A general procedure is presented to realize a two‐port impedance matrix by a generalized transformerless LC ladder network including the classical LC ladder structure as a special case. the realization process consists of repeatedly applying a subnetwork removal cycle for which six different cases are to be considered. the feasibility of the various subnetwork removals is characterized by formulating necessary and sufficient conditions on the impedance matrix. the application of the procedure is illustrated by a numerical example.