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A three‐terminal piecewise‐linear modelling approach to dc analysis of transistor circuits
Author(s) -
Hajj I. N.,
Roulston D. J.,
Bryant P. R.
Publication year - 1974
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.4490020203
Subject(s) - electronic circuit , discrete circuit , electronic engineering , computer science , linear circuit , piecewise linear function , transistor , electronic circuit simulation , equivalent circuit , piecewise , bipolar junction transistor , network analysis , terminal (telecommunication) , circuit design , integrated circuit , circuit extraction , transistor model , electrical engineering , engineering , mathematics , voltage , mathematical analysis , telecommunications , geometry , operating system
The simulation of electronic circuits by computer has become an important part of present‐day circuit analysis and design, especially in the area of integrated circuit design. One of the goals in computer simulation of integrated circuits is to have a program ‘package’ for which the input consists of chip fabrication data (mask dimensions, impurity profiles, material data such as carrier lifetimes) and the output displays the complete circuit response. This requires both an efficient modelling approach and a fast circuit analysis method. In this paper a simulation method is described which generates dc responses (in the form of operating points or transfer characteristics) of transistor circuits directly from physical parameter data. The basis of the method is a two‐dimensional piecewise‐linear approach to the dc modelling of bipolar transistors. The model is directly used in a piecewise‐linear circuit analysis program to simulate the dc response of a given circuit.