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Modelling the dynamics of log‐domain circuits
Author(s) -
Ascoli Alon,
Curran Paul,
Feely Orla
Publication year - 2006
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.379
Subject(s) - linearity , capacitor , logarithm , electronic circuit , nonlinear system , domain (mathematical analysis) , current (fluid) , time domain , voltage , transistor , control theory (sociology) , computer science , topology (electrical circuits) , electronic engineering , mathematics , electrical engineering , physics , engineering , mathematical analysis , control (management) , quantum mechanics , artificial intelligence , computer vision
Log‐domain filters are an intriguing form of externally linear, internally nonlinear current‐mode circuits, in which a compression stage is first used to convert the input currents to the logarithmic domain, then analogue processing is carried out on the resulting voltages, and finally input–output linearity is restored by mapping the output voltages to current form through an expansion stage. The compressing and expanding operations confer on log‐domain filters a number of desirable features, but they may be responsible for the loss of external linearity. In this paper, sufficient conditions for the external linearity of log‐domain LC‐ladders are established, and the local nature of this external linearity is highlighted. Certain log‐domain LC‐ladders employing floating capacitors may exhibit externally nonlinear behaviour even for zero input and very small initial conditions. We show how transistor parasitic capacitances are central to the emergence of this behaviour, and must be incorporated in the circuit model. Copyright © 2006 John Wiley & Sons, Ltd.