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Design of nine step switched capacitor multilevel inverter and its cascaded extension
Author(s) -
Velliangiri Suresh,
Ramasamy Senthilkumar,
Ponnusamy Prem,
M Jagabar Sathik
Publication year - 2021
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2926
Subject(s) - total harmonic distortion , switched capacitor , waveform , inverter , topology (electrical circuits) , capacitor , voltage , computer science , electronic engineering , cascade , network topology , electronic circuit , control theory (sociology) , engineering , electrical engineering , control (management) , chemical engineering , artificial intelligence , operating system
Summary Conventionally, multilevel inverter topologies require components like boost converter, voltage balancing circuits in addition to its switches and gate driver circuitry resulting in increased complexity. A new multilevel inverter topology using the concept of switched‐capacitor (SC) is proposed in this article. The basic structure capable of generating 9 level (9L) output voltage waveform with magnitude twice the input voltage at its terminals is proposed. Further, two identical structures are cascaded horizontally to attain 17 level (17L) based on structural modification is suggested. Simulation results are used to analyze the performance of the proposed 9L‐SCMLI and 17L‐SCMLI in the aspects of total harmonic distortion, R, RL, and dynamic loading conditions. The 9L‐SCMLI prototype model is developed to validate the adaptability of the proposed system.