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Three‐phase two‐leg buck‐boost DC‐AC inverter with differential power processor unit
Author(s) -
HossamEldin Ahmed A.,
Elserougi Ahmed A.,
Abdelsalam Ahmed K.,
Farghly Abdelrahman M.
Publication year - 2020
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2859
Subject(s) - converters , computer science , electronic engineering , topology (electrical circuits) , power electronics , inverter , grid , electrical engineering , buck converter , engineering , voltage , geometry , mathematics
Summary Renewable energy sources (RESs) need power‐electronics‐based converters to deliver the acquired power to the grid. Those converters should provide voltage‐bucking/boosting capabilities to accommodate various grid modes specially for three‐phase distorted commonly unbalanced distribution utility networks. Several power electronic‐based converters have been elaborated to fulfill this high‐demand market. Single‐stage converters are the most dominant in the market where the current source inverters (CSIs), impedance source inverters (ZSIs), and boost inverters are the high‐end candidates. The aspects of cost, footprint, and minimal numbers of active switches, in addition to simplified controllability, build the main challenges that face the evolution of robust renewable energy‐associated grid‐tied converters. This paper presents a novel three‐phase differential‐mode buck‐boost inverter based on two bidirectional buck‐boost DC/DC converters and one differential power processor (DPP) unit. The proposed topology is a single‐stage DC/AC converter offering bucking/boosting capability, with reduced hardware requirements. The proposed topology features a simplified control methodology in addition to reduced size and cost of the hardware setup which makes it more suitable for grid‐tied renewable energy applications. The operation principles, small‐signal model, and control strategy of the proposed topology are also illustrated. Simulation and experimental results are presented in details to verify the topology‐enhanced performance under various operating conditions. The deducted results elucidate the viability of the proposed configuration alongside with the claimed merits.