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A new discrete wavelet transform appropriate for hardware implementation
Author(s) -
Meshkat Amin,
Dehghani Rasoul
Publication year - 2020
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2836
Subject(s) - discrete wavelet transform , second generation wavelet transform , finite impulse response , stationary wavelet transform , lifting scheme , wavelet , wavelet transform , wavelet packet decomposition , computer science , multiplier (economics) , harmonic wavelet transform , infinite impulse response , algorithm , mathematics , digital filter , filter (signal processing) , arithmetic , artificial intelligence , computer vision , economics , macroeconomics
Summary A new method for computation of discrete wavelet transform (DWT) is introduced. The impulse response of the FIR filter, as the main block in filter bank (FB) method, is realized such that orthonormal wavelet transform is achieved without using any multiplier as the most challenging part of the FIR filters. The occupied slices and LUTs in the FPGA realization of the proposed wavelet in comparison with those of Daubechies wavelet are decreased by %50 and %56, respectively.