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Improved “K” type seven‐level switched capacitor inverter topology with Self‐voltage balancing
Author(s) -
Jagabar Sathik M.,
Sandeep N.,
Almakhles Dhafer,
Blaabjerg Frede
Publication year - 2020
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2811
Subject(s) - capacitor , topology (electrical circuits) , switched capacitor , voltage , inverter , decoupling capacitor , reservoir capacitor , computer science , electrical engineering , control theory (sociology) , electronic engineering , engineering , control (management) , artificial intelligence
Summary This paper proposes an improved “K” type seven‐level switched capacitor inverter topology. The proposed topology consists of eight active switches, one floating capacitor, and two dc‐link capacitors. The floating capacitors are charged and discharged in each half‐cycle to maintain the capacitor voltage with the same value of the input voltage. The floating capacitor voltage is self‐balanced, and the output voltage is 1.5 times higher than the input voltage. To prove the superiority of the proposed topology, it is compared with the existing seven‐level inverters in terms of maximum voltage stress on the switch and required the number of power components. The simulation and experimental validation are carried out for 1.6 kW, 50 Hz using a laboratory‐based setup with a switching frequency of 5 kHz. The results are discussed highlighting the performance of the proposed topology for the dynamic load variations at different modulation indices. Both simulation results and experimental results have good agreement in terms of voltage balancing of flying capacitor.