Premium
A second‐generation voltage conveyor (VCII)–based simulated grounded inductor
Author(s) -
Safari Leila,
Yuce Erkan,
Minaei Shahram,
Ferri Giuseppe,
Stornelli Vincenzo
Publication year - 2020
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2770
Subject(s) - current conveyor , inductor , rlc circuit , resistor , electronic engineering , spice , electrical impedance , cmos , block (permutation group theory) , output impedance , capacitor , filter (signal processing) , voltage , sensitivity (control systems) , engineering , electrical engineering , computer science , mathematics , geometry
Summary In this paper, an implementation of a simulated grounded inductor (SGI) based on a recently developed active building block called second‐generation voltage conveyor (VCII) is proposed. The proposed SGI employs two VCIIs, two resistors, and one grounded capacitor, which is preferred when integration is involved. More importantly, unlike most of the other previously reported SGIs, this one is free from any restrictive matching conditions. A complete analysis of nonidealities along with sensitivity treatment by considering parasitic impedances and nonideal gains of the VCII are performed. A simple VCII circuit is designed to be used in the implementation of the proposed SGI. To support the presented theory, Pspice simulation results using 0.18‐μm CMOS technology parameters and supply voltage of ±0.9 V are provided. On the basis of the achieved results, the proposed SGI operates in a good agreement with an ideal inductor. The power consumption is only 0.65 mW, and the parasitic series impedance is approximately 191.9 Ω. The applicability of the proposed SGI is tested by using it in a standard second‐order high‐pass RLC filter.