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Auto‐tuning charge balance control for improving transient response on buck converter
Author(s) -
Liu ChihWei,
Chen HungYu,
ChangChien LeRen
Publication year - 2020
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2767
Subject(s) - transient (computer programming) , transient response , buck converter , voltage , control theory (sociology) , field programmable gate array , slew rate , computer science , transient voltage suppressor , dynamic voltage scaling , electronic engineering , engineering , electrical engineering , control (management) , computer hardware , artificial intelligence , operating system
Summary Load transient and dynamic voltage scaling (DVS) are commonly seen in the operation of the system processor. These two functions usually encounter large output voltage transient, which is hard to be quickly settled. Charge balance control is one of the prior choices that enables the converter to operate at its optimal charge/discharge slew rate so as to achieve fast transient response. The effectiveness of the optimal performance generally requires precise knowledge of the circuit parameters for charge balance computation. However, parameter drifting due to the manufacturing process may affect the performance, which is hard to implement a power integrated circuit (IC) for wide range applications. Different from the original approaches, this paper proposes an auto‐tuning charge balance control (AT‐CBC) to optimize load transient response and DVS of the buck converter. The auto‐tuning mechanism can save the preknowledge of the output filter and avoid complex calculation in digital control. The function of AT‐CBC is validated by a field‐programmable gate array (FPGA) controlled buck converter. Experimental result shows that the output voltage can be settled within 3 μs for the 750‐mA load step transient. For the 0.3‐V DVS transient, the output voltage can be settled within 4 μs.