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0.6‐V CMOS cascode OTA with complementary gate‐driven gain‐boosting and forward body bias
Author(s) -
Cellucci Danilo,
Centurelli Francesco,
Di Stefano Valerio,
Monsurrò Pietro,
Pennisi Salvatore,
Scotti Giuseppe,
Trifiletti Alessandro
Publication year - 2020
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2703
Subject(s) - cascode , slew rate , transconductance , cmos , operational transconductance amplifier , boosting (machine learning) , electrical engineering , operational amplifier , electronic engineering , common source , transistor , voltage , biasing , amplifier , engineering , computer science , machine learning
Summary An innovative low‐voltage low‐power complementary metal‐oxide‐semiconductor (CMOS) gain boosting approach is presented. It exploits complementary gate‐driven gain boosting and adopts forward body bias, resulting in the minimum possible supply requirement of one threshold plus two saturation voltages, without requiring any additional current branch. The solution is also exploited in a rail‐to‐rail high‐performance single‐stage cascode operational transconductance amplifier (OTA). Simulations using a 40‐nm process with thresholds around 0.45 V show that 0.6 V and 50 μA are adequate to supply the designed OTA, which exhibits a 60‐dB direct current (DC) gain, a 45‐MHz unity‐gain frequency, and an 18‐V/μs slew rate, under a 1‐pF load.