A modified whitening transform for the reduction of spatial data redundancy in multichannel neural recording implants

Summary This paper proposes an approach for the reduction of redundant spatial information recorded by implantable high‐density neural recording microsystems. To realize the proposed approach, a modified whitening transform is introduced, which is efficient enough (in hardware implementation) to comply with the hardware design constraints associated with implantable microsystems. Based on the proposed approach, a 32‐channel processor is designed, prototyped, and tested for a library of both pre‐recorded and synthesized multichannel single‐unit neural signals. Designed in a 0.18‐μm standard CMOS technology, the processor occupies 0.3 mm 2 of silicon area and consumes 238 μW @1.8 V/1.28 MHz.