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Enhanced active‐feedback frequency compensation with on‐chip‐capacitor reduction feature for amplifiers with large capacitive load
Author(s) -
Lau Ming Wai,
Mak Kai Ho,
Leung Ka Nang,
Guo Jianping,
Goh Wang Ling
Publication year - 2017
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2326
Subject(s) - frequency compensation , operational transconductance amplifier , gain–bandwidth product , capacitor , amplifier , phase margin , electrical engineering , bandwidth (computing) , resistor , transconductance , operational amplifier , capacitive sensing , chip , cmos , electronic engineering , active load , buffer amplifier , engineering , voltage , transistor , telecommunications
Summary A large capacitive load amplifier with enhanced active‐feedback frequency compensation is proposed in this paper. The enhancement is achieved through using a wide‐bandwidth scalar circuit to increase the transconductance of the output stage so that the overall bandwidth of the amplifier can be extended considerably. Implemented in a standard CMOS 130‐nm technology, with a supply of 0.7 V and consuming 27 μA of current, the amplifier drives a load capacitor of 15 nF. No on‐chip resistor is needed; only a 0.91‐pF compensation capacitor is used to maintain stability. The achieved gain‐bandwidth product and phase margin are 1.28 MHz and 66.9°, respectively. Moreover, the slew rate is 0.263 V/μs. The active chip area is 0.0056 mm 2 . Copyright © 2017 John Wiley & Sons, Ltd.
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