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Area‐oriented comparison of lightweight block ciphers implemented in hardware for the activation mechanism in the anti‐counterfeiting schemes
Author(s) -
Marchand Cédric,
Bossuet Lilian,
Gaj Kris
Publication year - 2017
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2288
Subject(s) - computer science , field programmable gate array , block cipher , spartan , block (permutation group theory) , cryptography , implementation , embedded system , reduction (mathematics) , computer hardware , algorithm , geometry , mathematics , programming language
Summary Over the past 10 years, the multitude of highly constrained applications such as radio‐frequency identification and sensor networks has led to a new trend in the development of cryptographic primitives. Many algorithms categorized as lightweight cryptographic algorithms have been developed specifically for these new applications. Comparing them is very important but also very challenging because every application has its own constraints. This fact leads to a different choice of design strategies, and the best algorithm for one application is not necessarily the best for all applications. Moreover, the definition of what is lightweight is not always the same because lightweight covers a reduction in power and energy consumption just as well as a reduction in area for hardware. This article proposes and compares lightweight hardware implementations of four recent block ciphers (Klein, Led, Lilliput, and Ktantan). This work is included in a large project that aims to protect the hardware against cloning and counterfeiting. The main constraint in this field is the area required by the protection scheme. As a result, we chose to target only the smallest possible area for each selected algorithm. Consequently, two strategies are presented: full width and serial hardware implementations. All results were generated and verified for Xilinx Spartan‐6 and Spartan‐3 field‐programmable gate arrays and also for application‐specific integrated circuit. Additionally, all the design files are available online. Copyright © 2016 John Wiley & Sons, Ltd.