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Double‐frequency buck converter as a candidate topology for integrated envelope elimination and restoration applications in power supply of RFPAs
Author(s) -
Saberkari Alireza,
Shirmohammadli Vahideh,
Martinez Herminio,
Alarcón Eduard
Publication year - 2016
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2155
Subject(s) - buck converter , converters , ripple , bandwidth (computing) , electronic engineering , power (physics) , topology (electrical circuits) , cmos , amplifier , computer science , engineering , electrical engineering , physics , telecommunications , voltage , quantum mechanics
Summary This paper proposes the use of double‐frequency (DF) buck converter architecture consisting of a merged structure of high and low frequency buck cells as a candidate topology for envelope elimination and restoration (EER) applications and integrated power supply of RF power amplifiers (RFPA) to obtain favorable tradeoffs in terms of efficiency, switching ripple, bandwidth, and tracking capability. It is shown that having two degrees of freedom in designing the DF buck helps to achieve high efficiency, low output ripples, and tracking capability with low ripples, simultaneously. A comparison analysis is done with regards to the mentioned performance indexes with the standard and three‐level buck converters; in addition, the results are validated in HSPICE in BSIM3V3 0.35‐µm CMOS process. Copyright © 2015 John Wiley & Sons, Ltd.