A 0.7‐dB NF, +8.2‐dBm IIP3 CMOS low noise amplifier using frequency selective feedback

Summary A CMOS amplifier employing the frequency selective feedback technique using a shunt feedback capacitor is designed and measured. The proposed amplifier can achieve a high IIP3 (input referred third‐order intercept point) by reducing the third‐ and second‐order nonlinearity contributions to the IMD3 (third‐order intermodulation distortion), which is accomplished using a capacitor as the frequency selective element. Also, the shunt feedback capacitor improves the noise performance of the amplifier. By applying the technique to a cascode LNA using 0.18‐µm CMOS technology, we obtain the NF of 0.7 dB, an IIP3 of +8.2 dBm, and a gain of 15.1 dB at 14.4 mW of power consumption at 900 MHz. Copyright © 2015 John Wiley & Sons, Ltd.