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Crosstalk cancelling voltage‐mode driver for multi‐Gbps parallel DRAM interface
Author(s) -
Kim Younghoon,
Yoo Changsik
Publication year - 2015
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2003
Subject(s) - dram , cmos , crosstalk , voltage , driver circuit , electronic engineering , capacitive coupling , electrical engineering , computer science , engineering , computer hardware
Summary For multi‐Gb/s/pin parallel dynamic random access memory (DRAM) interface, a crosstalk cancelling voltage‐mode driver is proposed. The voltage‐mode driver is composed of a main driver and sub‐drivers where the cancellation signal is generated by the sub‐drivers. The outputs of the main driver and sub‐drivers are combined by a capacitive coupling so the direct current (DC) output swing is not affected by the crosstalk cancellation and the sub‐drivers may not consume DC power. The proposed crosstalk cancelling voltage‐mode driver implemented in a 0.11‐µm complementary metal‐oxide semiconductor (CMOS) technology improves the horizontal eye openings by 22.6 ps at 4‐Gbps/pin. Copyright © 2014 John Wiley & Sons, Ltd.