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Balanced G m ‐C filters with improved linearity and power efficiency
Author(s) -
AlguetaMiguel Jose M.,
De La Cruz Blas Carlos A.,
LopezMartin Antonio J.
Publication year - 2015
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.2001
Subject(s) - transistor , linearity , filter (signal processing) , butterworth filter , low pass filter , electronic engineering , cmos , topology (electrical circuits) , sensitivity (control systems) , analogue filter , cutoff frequency , engineering , high pass filter , computer science , electrical engineering , digital filter , voltage
Summary A novel G m ‐C filter design technique is presented. It is based on floating‐gate metal oxide semiconductor (FGMOS) transistors and consists in a topological rearrangement of conventional fully differential G m ‐C structures without modifying the employed transconductors at transistor level. The proposed method allows decreasing the number of active elements (transconductors) of the filter. Moreover, high linearity is obtained at low and medium frequencies of the pass band. Drawbacks inherent to the use of FGMOS transistors are analyzed, such as large occupied area, high sensitivity to mismatch, or parasitic zeros in transfer functions. The features of the proposed technique are fully exploited in all‐pole G m ‐C filter design, specially implementing unity gain Butterworth transfer functions. Thus, two low‐power second‐order Butterworth G m ‐C filters have been designed and fabricated to compare the proposed FGMOS technique with their equivalent topologies obtained by a conventional design method. Measurement results for a test chip prototype in a 0.5‐µm standard complementary MOS process are presented, confirming the advantages of the proposed FGMOS design technique. Copyright © 2014 John Wiley & Sons, Ltd.