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Compressive image acquisition in modern CMOS IC design
Author(s) -
Katic Nikola,
Kamal Mahdad Hosseini,
Schmid Alexandre,
Vandergheynst Pierre,
Leblebici Yusuf
Publication year - 2015
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.1969
Subject(s) - cmos , image sensor , compressed sensing , electronic engineering , computer science , integrated circuit , cmos sensor , correlated double sampling , sampling (signal processing) , nyquist–shannon sampling theorem , engineering , electrical engineering , artificial intelligence , computer vision , amplifier , filter (signal processing)
Summary Compressive sampling (CS) offers bandwidth, power, and memory size reduction compared to conventional (Nyquist) sampling. These are very attractive features for the design of modern complementary metal‐oxide semiconductor (CMOS) image sensors, cameras, and camera systems. However, very few integrated circuit (IC) designs based on CS exist because of the missing link between the well‐established CS theory on one side, and the practical aspects/effects related to physical IC design on the other side. This paper focuses on the application of compressed image acquisition in CMOS image sensor integrated circuit design. A new CS scheme is proposed, which is suited for hardware implementation in CMOS IC design. All the main physical non‐idealities are explained and carefully modeled. Their influences on the acquired image quality are analyzed in the general case and quantified for the case of the proposed CS scheme. The presented methodology can also be used for different CS schemes and as a general guideline in future CS based CMOS image sensor designs. Copyright © 2013 John Wiley & Sons, Ltd.