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Asynchronous sum‐of‐products logic minimization and orthogonalization
Author(s) -
Lemberski Igor,
Fišer Petr,
Suleimanov Ruslan
Publication year - 2014
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.1870
Subject(s) - orthogonalization , asynchronous communication , asynchronous circuit , computer science , logic optimization , logic synthesis , minification , state (computer science) , sequential logic , combinational logic , transformation (genetics) , algorithm , logic gate , programming language , telecommunications , clock signal , biochemistry , jitter , chemistry , synchronous circuit , gene
We propose a method of the asynchronous sum‐of‐products (SOP) logic simplification that comprises of minimization and orthogonalization. The method is based on a transformation of the conventional single‐rail SOP synchronous logic into the dual‐rail asynchronous one operating under so‐called modified weak constraints. We formulate and prove the product terms constraint that ensures a correct logic behavior. We have processed the MCNC benchmarks and generated the asynchronous SOP logic. The complexity of the logic obtained is compared with the state‐of‐the‐art representation. Using our approach, we achieve a significant improvement. Copyright © 2012 John Wiley & Sons, Ltd.