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Low‐noise low‐power front‐end logarithmic amplifier for neural recording system
Author(s) -
Derafshi Zahra Haddad,
Frounchi Javad
Publication year - 2014
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.1861
Subject(s) - log amplifier , preamplifier , amplifier , direct coupled amplifier , operational transconductance amplifier , instrumentation amplifier , electrical engineering , linear amplifier , noise (video) , low noise amplifier , operational amplifier , electronic engineering , physics , cmos , computer science , engineering , artificial intelligence , image (mathematics)
SUMMARY In this work, a low‐power, low‐noise logarithmic preamplifier for biopotential and neural recording application is presented. The amplifier is based on a linear limit logarithmic amplifier technique, and an active filter as a DC cancellation filter has been included to its input in order to eliminate DC offsets, which are produced at the electrode–tissue interface. This system has been simulated in a UMC standard 90‐nm 1P9M CMOS process. Five dual gain stages are used to produce the required linear limit logarithmic amplifier. The dynamic range of the amplifier is measured to be 48 dB which covers the signals with amplitude from 20 μV to 5 mV. The amplifier consumes 23.5 μW from a 1.2‐V power supply and has a maximum gain of 69.8 dB. The simulated input referred noise is 5.3 μV over 0.1 Hz to 20 kHz. Copyright © 2012 John Wiley & Sons, Ltd.