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A fully integrated, highly linear CMOS T/R switch for X‐Band phased array radars
Author(s) -
Dinc Tolga,
Zihir Samet,
Gurbuz Yasar
Publication year - 2014
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.1852
Subject(s) - cmos , phased array , bicmos , electrical engineering , radar , chip , transistor , insertion loss , electrical impedance , resistive touchscreen , power (physics) , electronic engineering , engineering , computer science , optoelectronics , materials science , physics , telecommunications , voltage , antenna (radio) , quantum mechanics
This paper presents the design and implementation of a single‐pole, double‐throw transmit/receive (T/R) switch for X‐Band (8–12 GHz) phased array radar applications. The T/R switch was fabricated in a 0.25‐µm SiGe BiCMOS process and occupies 0.44‐mm 2 chip area, including pads. The design focuses on the techniques, primarily, to achieve higher power handling capability (P 1dB ), along with higher isolation and better insertion loss (IL) of the T/R switch. These techniques include resistive‐body floating, using on‐chip impedance transformation networks and DC biasing of all terminals of the T/R switch. In addition, optimization of transistor widths and parallel resonance technique are used to improve IL and isolation, respectively. All these design techniques resulted in a measured IL of 3.6 dB, isolation of 34.8 dB and IP 1dB of 28.2 dBm at 10 GHz. The return losses at both input and output ports are better than 16 dB from 8 to 12 GHz. To our knowledge, this paper presents the single‐ended CMOS T/R switch with the highest IP 1dB , competitive isolation and comparable IL at X‐Band, compared to other reported works in the literature and attributed to the unique design methodologies and techniques. Copyright © 2012 John Wiley & Sons, Ltd.