Premium
A 13 bit 10 MHz bandwidth MASH 3–2 Σ∆ modulator in 90 nm CMOS
Author(s) -
Sohrabi Zahra,
Yavari Mohammad
Publication year - 2013
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.1816
Subject(s) - cmos , delta sigma modulation , electronic engineering , broadband , bandwidth (computing) , noise shaping , dynamic range , quantization (signal processing) , engineering , electrical engineering , computer science , telecommunications , computer vision
In this paper, a new multi loop sigma‐delta (ΣΔ) modulator is proposed which employs one order redundant noise shaping in the first stage so the effect of the quantization noise leakage is minimized. Thus, analog circuit requirements are considerably relaxed compared to the conventional Multi‐stAge‐noise‐SHaping (MASH) structures. This enhancement makes the structure appropriate for low voltage and broadband applications. The proposed architecture is compared with traditional high‐order structures, and the advantages are demonstrated by both the analysis and behavioral system level simulations. As a prototype, the proposed MASH 3–2 sigma‐delta modulator is designed, and the detailed design procedure is presented from the system level to the circuit level in a 90 nm CMOS technology. Circuit level simulation results show that the modulator achieves a peak signal‐to‐noise and distortion ratio of 79.4 dB and 79 dB dynamic range over a 10 MHz bandwidth with a sampling frequency of 160 MHz. It consumes 35.4 mW power from a single 1 V supply. Copyright © 2012 John Wiley & Sons, Ltd.