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A transient‐improved low‐dropout regulator with nested flipped voltage follower structure
Author(s) -
Chen Hua,
Leung Ka Nang
Publication year - 2013
Publication title -
international journal of circuit theory and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.364
H-Index - 52
eISSN - 1097-007X
pISSN - 0098-9886
DOI - 10.1002/cta.1812
Subject(s) - low dropout regulator , control theory (sociology) , transient response , dropout (neural networks) , transient (computer programming) , capacitor , voltage regulator , regulator , dropout voltage , engineering , cmos , voltage , computer science , electronic engineering , electrical engineering , biochemistry , chemistry , control (management) , artificial intelligence , machine learning , gene , operating system
SUMMARY In this article, the existing low‐dropout regulator (LDO) based on cascoded flipped voltage follower (CAFVF) is reviewed. A new method to simulate the open‐loop gain of an LDO with a CAFVF structure is conveyed. The drawback of CAFVF‐based LDO is that the nondominant pole locates at low‐frequency and pole‐zero cancellation using a large equivalent series resistance of loading capacitor is required for stability. To tackle this problem, a novel LDO structure based on a nested CAFVF is proposed and analyzed in this article. It is shown that the nondominant pole is pushed to a high frequency and the LDO stability is improved. The proposed circuit is fabricated using a commercial 0.35‐µm CMOS technology, and the load‐transient response between 0.5 and 60 mA settles at approximately 5 µs. Copyright © 2012 John Wiley & Sons, Ltd.
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