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A novel ultra‐dense and low‐power structure for fault‐tolerant three‐input majority gate in QCA technology
Author(s) -
Ahmadpour SeyedSajad,
Mosleh Mohammad
Publication year - 2019
Publication title -
concurrency and computation: practice and experience
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.309
H-Index - 67
eISSN - 1532-0634
pISSN - 1532-0626
DOI - 10.1002/cpe.5548
Subject(s) - quantum dot cellular automaton , cmos , cellular automaton , adder , fault tolerance , computer science , electronic engineering , dissipation , electronic circuit , power (physics) , algorithm , engineering , electrical engineering , physics , distributed computing , quantum mechanics , thermodynamics
Summary Quantum‐dot cellular automata (QCA) is a very interesting nanoscale technology. Ultradense structure and ultralow power consumption are the most important features of QCA compared to CMOS. QCA circuits often suffer from various types of manufacturing defects and are therefore prone to fault. Hence, the design of fault‐tolerant circuits in QCA technology is considered a necessity. In this paper, a novel fault‐tolerant three‐input majority gate is presented using 12 simple and rotated cells in QCA technology. The proposed structure is investigated against all kinds of cell omission, extra‐cell deposition, and cell displacement defects. The simulation results are verified by QCADesigner 2.0.3, and it showed 100%, 89.29%, and 100% tolerance against single‐cell omission, double‐cell omission, and extra‐cell deposition, respectively. In addition, the proposed structure is robust against cell displacement defects. Finally, using the proposed structure, a novel coplanar full adder is presented. The results were compared and indicated that the proposed designs are more reliable than the existing designs. Furthermore, QCAPro power estimator tool was employed to estimate the energy dissipation of the proposed structure.