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Zynq SoC based acceleration of the lattice Boltzmann method
Author(s) -
Zhai Xiaojun,
Amira Abbes,
Bensaali Faycal,
AlShibani AlMaha,
AlNassr Asma,
ElSayed Asmaa,
Eslami Mohammad,
Dakua Sarada Prasad,
Abinahed Julien
Publication year - 2019
Publication title -
concurrency and computation: practice and experience
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.309
H-Index - 67
eISSN - 1532-0634
pISSN - 1532-0626
DOI - 10.1002/cpe.5184
Subject(s) - computer science , lattice boltzmann methods , system on a chip , software , acceleration , embedded system , hardware acceleration , multi core processor , arm architecture , computational science , simulation , parallel computing , field programmable gate array , operating system , physics , classical mechanics , quantum mechanics
Summary Cerebral aneurysm is a life‐threatening condition. It is a weakness in a blood vessel that may enlarge and bleed into the surrounding area. In order to understand the surrounding environmental conditions during the interventions or surgical procedures, a simulation of blood flow in cerebral arteries is needed. One of the effective simulation approaches is to use the lattice Boltzmann (LB) method. Due to the computational complexity of the algorithm, the simulation is usually performed on high performance computers. In this paper, efficient hardware architectures of the LB method on a Zynq system‐on‐chip (SoC) are designed and implemented. The proposed architectures have first been simulated in Vivado HLS environment and later implemented on a ZedBoard using the software‐defined SoC (SDSoC) development environment. In addition, a set of evaluations of different hardware architectures of the LB implementation is discussed in this paper. The experimental results show that the proposed implementation is able to accelerate the processing speed by a factor of 52 compared to a dual‐core ARM processor‐based software implementation.