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A survey of techniques for designing and managing CPU register file
Author(s) -
Mittal Sparsh
Publication year - 2016
Publication title -
concurrency and computation: practice and experience
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.309
H-Index - 67
eISSN - 1532-0634
pISSN - 1532-0626
DOI - 10.1002/cpe.3906
Subject(s) - register file , computer science , operand , reliability (semiconductor) , component (thermodynamics) , register (sociolinguistics) , operating system , processor register , embedded system , computer architecture , computer hardware , instruction set , memory address , power (physics) , linguistics , philosophy , physics , semiconductor memory , quantum mechanics , thermodynamics
Summary Processor register file (RF) is an important microarchitectural component used for storing operands and results of instructions. The design and operation of RF have crucial impact on the performance, energy efficiency, and reliability of the processor, and hence, several techniques have been recently proposed to manage RF in modern processors. In this paper, we present a survey of techniques for architecting and managing CPU register file. We classify the techniques across several parameters to underscore their similarities and differences. We hope that this paper will provide insights to researchers into working of RF and inspire even more efforts towards optimization of RF in next‐generation computing systems. Copyright © 2016 John Wiley & Sons, Ltd.