Guest Editorial

Application domains such as pharmaceutical discovery, combinatorial optimization or climate modeling demand performance levels well beyond the abilities of current high-performance uniprocessor architectures, for which parallel computing has long been seen as a key enabling technique. To meet this challenge, researchers in academia and industry have developed, numerous algorithmic and architectural solutions to take advantage of the natural performance benefits of the parallel computation paradigm. Parallel computing and parallel architectures are not only for high-performance computing. The relentless increase in very large-scale implementation (VLSI) capacities has enabled the migration of these architectures and thus computing paradigms to virtually any computing device, from the multi-core desktop computer to the embedded automobile control system. Regardless of the many structural and system-level differences between the parallel computing solutions proposed, developed and ultimately deployed in the various application domains, parallel computing relies on multiple processing units executing concurrently, cooperating and synchronizing in the pursuit of completing common tasks as quickly as possible. Despite its intuitive appeal, parallel computing is fraught with peril. The concurrent paradigm requires a fundamentally distinct programming mindset. To effectively exploit the computational abilities of parallel architectures, programmers must reason about the interactions between concurrent activities. Notoriously hard are the problems raised by the synchronization required to access shared resources, as programmers must be aware of the possibilities of load imbalance, livelock, starvation and even deadlock between the many executing tasks. The existence of heterogeneous resources, and in some domains real-time requirements, exacerbates the difficulty in programming parallel architectures. Researches in industry and academia have developed numerous programming models and languages to facilitate the programmability aspects in parallel computing, most notably allowing them to express concurrency and synchronization at various levels of granularity. Programmers also have at their disposal a wealth of tools such as compilers or performance analyzers, lowering their burden in the process of mapping computations to these parallel architectures. The continuing intense research in areas related to parallel computing and parallel architectures underscores the difficulty in the issues raised when programming these machines. The Compilers for Parallel Computers (CPC) workshop series has been devoted to addressing the many challenges in parallel computing while still recognizing the value of parallel computing basic techniques and application areas. The main goal of the workshop is to bring researchers in compilation and associated areas together in an informal setting and a relaxed atmosphere in