Computer architecture and FPGAs: A learning‐by‐doing methodology for digital‐native students

The theoretical teaching of Computer Architecture is not suitable longer. In the present time, students claim for a learning‐by‐doing according to their dynamic and active character. Nowadays, interactive teaching is possible thanks to the decrease in the prices of the Field Programmable Gate Arrays. This paper proposes a learning‐by‐doing methodology to teach Computer Architecture to first‐year student who belong to a digital‐native generation. The method consists in developing a whole computer from scratch while they are introduced to hardware description languages (HDL) and programmable logic devices. Firstly, students design each and every element of the computer by VHDL language. Later on, they interconnect the verified elements and test the complete computer. A FPGA‐based board is needed to implement and check the correct performance of the designed computer. This educational approach is intended to be used with first‐year students from Computer Engineering Degree, thus, it is the first experience of the students with the basics of Computer Architecture. Students have a computer and a FPGA‐based board in anytime. In the final exam, a design of a different computer is propounded. Computer testing and programming is a requirement to pass. The high percentage of passed students corroborated the success of the methodology. Thus, computer functioning and construction is understood by a hands‐on methodology at the same time as VHDL language and FPGA technology are introduced. Lack attention is avoided since students keep a dynamic role working with their personal computer and FPGA at all times. © 2015 Wiley Periodicals, Inc. Comput Appl Eng Educ 23:464–470, 2015; View this article online at wileyonlinelibrary.com/journal/cae ; DOI 10.1002/cae.21617