An FPGA‐based integrated environment for computer architecture | Zendy

Bulić Patricio | Zendy; Guštin Veselko | Zendy; Šonc Damjan | Zendy; Štrancar Andrej | Zendy

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An FPGA‐based integrated environment for computer architecture

Author(s) -

Bulić Patricio,

Guštin Veselko,

Šonc Damjan,

Štrancar Andrej

Publication year - 2013

Publication title -

computer applications in engineering education

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.478

H-Index - 29

eISSN - 1099-0542

pISSN - 1061-3773

DOI - 10.1002/cae.20448

Subject(s) - debugging , computer science , field programmable gate array , microprocessor , embedded system , pipeline (software) , computer hardware , software , arm architecture , operating system

We present a new, integrated environment used in computer‐architecture education. The environment consists of a hardware platform and GUI software running on a PC. The hardware platform is entirely implemented in Xilinx Spartan‐3 FPGA. The main part of the hardware platform is a 32‐bit pipelined RISC processor with a trace/debug unit. This trace/debug unit is a hardware unit that enables debugging and transfers the pipeline contents to the PC. It also enables communication between the GUI application on the PC and the microprocessor core. Such a system makes it possible to download the students' programs to the FPGA‐based microprocessor and graphically depicts the processor's internal state on the PC. © 2010 Wiley Periodicals, Inc. Comput Appl Eng Educ 21: 26–35, 2013

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