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Determining the target value of ACICD to optimize the electrical characteristics of semiconductors using dual response surface optimization
Author(s) -
Lee DongHee,
Kim KwangJae
Publication year - 2013
Publication title -
applied stochastic models in business and industry
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.413
H-Index - 40
eISSN - 1526-4025
pISSN - 1524-1904
DOI - 10.1002/asmb.1973
Subject(s) - dual (grammatical number) , dimension (graph theory) , semiconductor , computer science , process (computing) , semiconductor device fabrication , materials science , mathematics , nanotechnology , optoelectronics , art , literature , wafer , pure mathematics , operating system
After Cleaning Inspection Critical Dimension (ACICD), one of the main variables in the etch process, affects the electrical characteristics of fabricated semiconductor chips. Its target value should be determined to minimize the bias and variability of these electrical characteristics. This paper presents a case study in which the target value of ACICD is determined by the dual response optimization method. In particular, the recently developed posterior approach to dual response optimization is employed allowing the analyst to determine easily the optimal compromise between bias and variability in the electrical characteristics. The performance at the obtained optimal ACICD setting has been shown to be better than that at the existing setting. Copyright © 2013 John Wiley & Sons, Ltd.