Open AccessStateful In‐Memory Logic System and Its Practical Implementation in a TaO x ‐Based Bipolar‐Type Memristive Crossbar Array
Author(s) -
Kim Young Seok,
Son Myeong Won,
Song Hanchan,
Park Juseong,
An Jangho,
Jeon Jae Bum,
Kim Geun Young,
Son Seoil,
Kim Kyung Min
Publication year - 2020
Publication title -
advanced intelligent systems
Language(s) - English
Resource type - Journals
ISSN - 2640-4567
DOI - 10.1002/aisy.201900156
Subject(s) - stateful firewall , memristor , computer science , computer architecture , computer hardware , electronic engineering , engineering , computer network , network packet
Memristive stateful logic enables energy‐ and cost‐efficient in‐memory computing, which is desirable for edge computing in the coming Internet of Things (IoT) era. Researchers have recently developed various stateful logic gates and have shown viable computing applications based on ideal memristive characteristics. However, few studies have demonstrated a system‐level in‐memory computing operation that can address the practical issues affecting device realization. Herein, a practically viable stateful logic device based on a 1‐transistor−1‐memristor (1T1M) array structure is proposed, considering the inherently stochastic memristor characteristics. Details on how to select the viable stateful logic gates in a given memristor are shown, and as an example of logic cascading, they are implemented in a device to operate a multibit carry look‐ahead adder. Then, an in‐memory computing layout that can perform all of the computing functions—data storing, transferring, and executing—inside the memory, addressing data traffic issues, is suggested. Finally, a software/hardware mixed stateful logic emulator that can virtually mimic array‐level in‐memory computing hardware based on cell‐level memristive characteristics is demonstrated.