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A Memristor with Low Switching Current and Voltage for 1S1R Integration and Array Operation
Author(s) -
Upadhyay Navnidhi K.,
Sun Wen,
Lin Peng,
Joshi Saumil,
Midya Rivu,
Zhang Xumeng,
Wang Zhongrui,
Jiang Hao,
Yoon Jung Ho,
Rao Mingyi,
Chi Miaofang,
Xia Qiangfei,
Yang J. Joshua
Publication year - 2020
Publication title -
advanced electronic materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.25
H-Index - 56
ISSN - 2199-160X
DOI - 10.1002/aelm.201901411
Subject(s) - memristor , electroforming , materials science , resistive random access memory , optoelectronics , voltage , low voltage , crossbar switch , stacking , nanotechnology , electrical engineering , layer (electronics) , engineering , physics , nuclear magnetic resonance
Memristor devices could realize their full scaling (2D) and stacking (3D) potential if vertically integrated with a two‐terminal selector in a one selector one memristor (1S1R) crossbar array. However, for a 1S1R‐integrated device to function properly, memristor and selector should be compatible in terms of their material composition and electrical properties. A platinum (Pt)/yttria‐stabilized zirconia (YSZ)/zirconium (Zr) memristor with low forming voltage (<1.5 V), low first reset current (150 µA), fast switching speed (2 ns), low voltage (<1 V) and current (50 µA) resistive switching operation, and multi‐conductance state capabilities is reported. A low activation energy of oxygen vacancy diffusion ( E a,diffusion = 0.7 eV) measured in the YSZ switching layer enables the proposed memristor to have the observed low‐energy operation, which renders it better compatible with a selector device than the more commonly used binary oxides. For a proof‐of‐principle demonstration, the device is vertically integrated with a tunneling selector and successfully performs memristor‐electroforming operations with the selector in a self‐compliant 1S1R integrated device. 1S1R cells into a small array (2 × 2) are further investigated and electroforming and resistive switching operations at the array level are demonstrated.