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A Silicon Nanowire Ferroelectric Field‐Effect Transistor
Author(s) -
Sessi Violetta,
Simon Maik,
Mulaosmanovic Halid,
Pohl Darius,
Loeffler Markus,
Mauersberger Tom,
Fengler Franz P. G.,
Mittmann Terence,
Richter Claudia,
Slesazeck Stefan,
Mikolajick Thomas,
Weber Walter M.
Publication year - 2020
Publication title -
advanced electronic materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.25
H-Index - 56
ISSN - 2199-160X
DOI - 10.1002/aelm.201901244
Subject(s) - materials science , ferroelectricity , optoelectronics , field effect transistor , transistor , schottky barrier , nanowire , wafer , schottky diode , silicon , threshold voltage , polarization (electrochemistry) , nanotechnology , voltage , electrical engineering , chemistry , diode , dielectric , engineering
The design and characterization of a Schottky‐type ferroelectric field‐effect transistor based on a nominally undoped silicon nanowire are reported. The nanowire transistor is fabricated by top‐down technology starting from a silicon‐on insulator wafer. A thin ferroelectric Hf 0.38 Zr 0.62 O 2 layer is integrated via a gate‐first approach. Abrupt Schottky source/drain contacts to the undoped silicon are provided by NiSi 2 formation. Two distinct nonvolatile transistor states ( programmed and erased ) are observed in correspondence to negative and positive polarization in the ferroelectric layer, delivering a memory window of ≈1.5 V and, differently to conventional ferroelectric field effect transistors, yielding an on‐current difference of up to 30%. These results are interpreted as a combination of effects, arising from the proximity of the ferroelectric layer to both the channel and the Schottky‐junction regions. The threshold voltage shift, due to a polarization field acting on the channel, adds up to a polarization field‐driven tuning of the current injection through the Schottky‐source junction. This provides a strategy for manufacturing Schottky‐type nanoscale transistors with the add‐on nonvolatile option, following a complementary metal‐oxide‐semiconductor compatible process. In particular, the device concept is of great interest for achieving nonvolatile polarity modification in reconfigurable field‐effect transistors.