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Boolean and Sequential Logic in a One‐Memristor‐One‐Resistor (1M1R) Structure for In‐Memory Computing
Author(s) -
Zhou YaXiong,
Li Yi,
Duan Nian,
Wang ZhuoRui,
Lu Ke,
Jin MiaoMiao,
Cheng Long,
Hu SiYu,
Chang TingChang,
Sun HuaJun,
Xue KanHao,
Miao XiangShui
Publication year - 2018
Publication title -
advanced electronic materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.25
H-Index - 56
ISSN - 2199-160X
DOI - 10.1002/aelm.201800229
Subject(s) - von neumann architecture , memristor , computer science , bottleneck , sequential logic , logic gate , non volatile memory , pass transistor logic , digital electronics , computer hardware , electronic engineering , embedded system , electrical engineering , electronic circuit , algorithm , engineering , operating system
Abstract Memristive devices acting as high‐performance in‐memory computing fabrics have attracted much attention for nonvolatile parallel architectures to break the von Neumann bottleneck. Here, for the first time, a nonvolatile digital logic system with three‐terminal Pt/SiO 2 /Pt/Ag/GeTe/Ta one‐memristor‐one‐resistor (1M1R) structure is presented. Programmable nonvolatile Boolean logic gates and clocked sequential logic blocks including D latch and D flip‐flop are experimentally implemented, based on which a 4‐bit linear‐feedback shift register with timing design is functionally verified in simulation. With information generation, processing, transmission, and storage performing within the same 1M1R‐based logic blocks, these results consolidate the feasibility of building memristive digital computing system for future non‐von Neumann computing.