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Interface Modulation and Optimization of Electrical Properties of HfGdO/GaAs Gate Stacks by ALD‐Derived Al 2 O 3 Passivation Layer and Forming Gas Annealing
Author(s) -
Jiang Shanshan,
He Gang,
Liu Mao,
Zhu Li,
Liang Shuang,
Li Wendong,
Sun Zhaoqi,
Tian Mingliang
Publication year - 2018
Publication title -
advanced electronic materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.25
H-Index - 56
ISSN - 2199-160X
DOI - 10.1002/aelm.201700543
Subject(s) - materials science , passivation , forming gas , x ray photoelectron spectroscopy , annealing (glass) , dielectric , analytical chemistry (journal) , high κ dielectric , gate dielectric , equivalent oxide thickness , capacitor , optoelectronics , oxide , atomic layer deposition , metal gate , gate oxide , nanotechnology , layer (electronics) , voltage , electrical engineering , composite material , chemical engineering , metallurgy , chemistry , transistor , chromatography , engineering
Metal‐oxide‐semiconductor (MOS) capacitors with sputtering‐deposited Gd‐doped HfO 2 (HGO) high k gate dielectric thin films and ALD‐derived Al 2 O 3 interfacial passivation layer were fabricated on GaAs substrates. The effects of the passivation layer and the forming gas annealing (FGA) temperature were explored by studying the interfacial chemical bonding states and electrical properties of HGO/GaAs and HGO/Al 2 O 3 /GaAs gate stacks via x‐ray photoelectron spectroscopy (XPS), capacitance‐voltage ( C–V ), and leakage current density‐voltage ( J–V ) measurements. Results indicated that the MOS capacitors performances were enhanced by performing FGA. The electrical analysis revealed that the 300 °C‐annealed Al/HGO/GaAs/Al MOS capacitor with 20 cycles Al 2 O 3 passivation layer experienced improved electrical properties, with a dielectric constant of 44, a flat band voltage of 0.64 V, a hysteresis of 0.02 V corresponding to the oxide charge density of −6.2 × 10 12 cm 2 , border trapped oxide charge density of −3.02 × 10 11 cm 2 , a leakage current density 5.87 × 10 ‐6 A/cm 2 at a bias voltage of 2 V. The low temperature (77–300 K) dependent detailed current conduction mechanisms (CCMs) of the 300 °C‐annealed MOS capacitor at low temperatures were also systematically investigated. The optimized interface chemistry and the excellent electrical properties suggested that HGO/Al 2 O 3 /GaAs potential gate stacks could be applied in future III‐V‐based MOSFET devices.